Apple Wireless Design Verification Engineer in San Diego, California
Wireless Design Verification Engineer
San Diego, California, United States
7+ years Wireless/Wired communication block/system verification experience
Advanced knowledge of SystemVerilog and DV methodology.
Solid verification skills in problem solving, constrained random testing, and debugging.
Knowledge of wireless protocols such as Bluetooth, WLAN, or Zigbee a plus.
Experience with MAC or PHY Verification a plus.
Experience with SOC subsystem verification a plus.
Experience with SystemVerilog Assertion (SVA) a plus.
Should be a team player with excellent communication skills and the desire to take on diverse challenges.
- Build block / subsystem / chip level testbench using best in class DV methodology. - Build verification plan from specification and review with designers and systems engineers. - Architect testbench with maximum reusability in mind, and create UVM libraries. - Generate directed and constrained random tests. - Debug failures, manage bug tracking, and close coverage. - Create and analyze block/subsystem level coverage model, and add test cases to increase coverage. - Attend verification reviews and set standard for coding quality. - Work closely with DV methodology architects to improve verification flow.
Education & Experience
MSEE and beyond preferred
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