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Cadence Design Systems, Inc. SoC Architect in Austin, Texas

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Responsibilities:

Analyze customer high level specifications, software work-loads, security/safety, BOM cost and reliability goals to generate

  • Top level block diagram, High level and Micro architecture level spec of SoC

  • Selection, Sizing and configuration of processor IP, Fabric and Memory (SRAM/DRAM)

  • Trace and debug specification

  • Power, clock, reset and boot mechanism

  • Produce architecture for fixed function blocks

  • Evaluate, select and configure DSP/co-processor IP to meet system requirements

  • Evaluate, select and configure Memory and Interface IPs (PCIe, MIPI, Ethernet ..)

  • Drive/support chip level test, debug and DFT

Working level experience with ARM and/or RISC portfolio/processors

Hands on experience on Front Ends tasks such as: RTL integration and generation, timing constraint generation, Synthesis and Clock/Rest domain crossing checks and sign offs

Create and analyze performance models (System C /TLM) to tune performance against customer requirements

Create Low Power methodology to ensure SoC meets power requirements through all stages of design. Experience in UPF usage/creation

Lead post silicon chip debug and bring up (SW boot)

Support PD and verification teams to ensure successful deliveries and first pass Silicon

Detailed and clear communication/documentation to ensure all customer and internal design teams are in-sync

Mandatory:

BS/MS Engineering or Computer Science with 12+ years of SoC Front End Design experience

4+ years experience in top level architecture and design leadership of complex SoC

Experienced with ARM IP selection, configuration and core-sight

Proven track record to taking products to market with first Silicon Success

Successful experience to highlight expertise in all aspects of job responsibilities

Self-driven and organized, ability to prioritize and track personal assignments and commitments through completion. Good interpersonal and communication skills

Strong hands-on knowledge of CDNS digital front end and implementation technologies

Desirable:

Experience in Security schemes and implementations

Experience in Automotive Functional Safety. Architecting SoCs to meet system level ASIL targets

Experience in low power SoC design architecture

Proficient with commercially available NOCs and Fabrics

Demonstrated strong technical leadership and decision making; ability to influence product groups to ensure alignment and product success

An outside-the-box thinker with a proven track record

Multi-tasker, with good program management skills

We’re doing work that matters. Help us solve what others can’t.

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. 
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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