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Apple GPU Memory Hierarchy Design Verification Engineer in Austin, Texas

GPU Memory Hierarchy Design Verification Engineer

Austin, Texas, United States

Hardware

  • The ideal candidate will have relevant 3+ years of experience including:

  • Expertise with verification language such as SystemVerilog/UVM/OVM, Verilog/VHDL; Specman experience is ideal.

  • Strength in creating software solutions utilizing object oriented programming concepts.

  • Expertise with HDL simulators and waveform viewers.

  • Experience defining coverage space, writing coverage model, analyzing results.

  • Experience working under strict schedule deadlines with the ability to manage multiple priorities.

  • Strong knowledge of computer architecture, general purpose microprocessor.

  • Experience and expertise in memory/cache sub-system micro-architecture, which could include L1, L2, L3 caches, coherent interconnects, MMUs or related blocks.

  • Experience with Perl, Shell scripting, Makefiles, TCL a plus.

  • Excellent communication skills and ability to collaborate.

  • GPU experience, especially in the memory hierarchy area, is a plus.

Description

As a GPU Memory Hierarchy Design Verification Engineer, you will be responisble for: Developing verification plans in coordination with design leads and architects. Building and maintaining verification test bench components and environments. Generating directed and constrained random tests. Running simulations and debugging design and environment issues. Crafting functional coverage points, analyze coverage, and enhance test environment to target coverage holes. Creating automated verification flows for block verification Applying knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog/UVM/OVM), and logic simulators to verify complex designs Working with other block and core level engineers to ensure seamless verification flow

Education & Experience

BS/MS CE or EE

Additional Requirements

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